? Makefile ? current.diff ? duoview-20040719.diff ? duoview-20040724.diff ? duoview.diff ? savage.4.html ? savage._man Index: savage_accel.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_accel.c,v retrieving revision 1.19 diff -u -r1.19 savage_accel.c --- savage_accel.c 26 Mar 2004 17:09:04 -0000 1.19 +++ savage_accel.c 24 Jul 2004 22:15:36 -0000 @@ -212,7 +212,7 @@ void writescan( unsigned long scan, unsigned long color ); static int GetTileAperturePitch(ulong dwWidth, ulong dwBpp); -void SavageSetGBD_M7(ScrnInfoPtr pScrn); +void SavageSetGBD_M7(ScrnInfoPtr pScrn); void SavageSetGBD_Twister(ScrnInfoPtr pScrn); void SavageSetGBD_PM(ScrnInfoPtr pScrn); void SavageSetGBD_2000(ScrnInfoPtr pScrn); @@ -465,6 +465,7 @@ case S3_SAVAGE2000: SavageSetGBD_2000(pScrn); break; + } } @@ -477,8 +478,8 @@ if (psav->Chipset == S3_SAVAGE4) { bci_enable = BCI_ENABLE; - tile16 = TILE_FORMAT_DESTINATION16; - tile32 = TILE_FORMAT_DESTINATION32; + tile16 = TILE_FORMAT_16BPP; + tile32 = TILE_FORMAT_32BPP; } else { bci_enable = BCI_ENABLE_TWISTER; tile16 = TILE_DESTINATION; @@ -644,9 +645,8 @@ int bci_enable, tile16, tile32; bci_enable = BCI_ENABLE; - tile16 = TILE_FORMAT_DESTINATION16; - tile32 = TILE_FORMAT_DESTINATION32; - + tile16 = TILE_FORMAT_16BPP; + tile32 = TILE_FORMAT_32BPP; /* following is the enable case */ @@ -701,10 +701,11 @@ #endif /* MM81C0 and 81C4 are used to control primary stream. */ - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000); + + OUTREG32(PRI_STREAM_FBUF_ADDR0,pScrn->fbOffset | 0x80000000); + OUTREG32(PRI_STREAM_FBUF_ADDR1,pScrn->fbOffset); + OUTREG32(PRI_STREAM2_FBUF_ADDR0,pScrn->fbOffset | 0x80000000); + OUTREG32(PRI_STREAM2_FBUF_ADDR1,pScrn->fbOffset); /* * Program Primary Stream Stride Register. @@ -924,12 +925,13 @@ } /* MM81C0 and 81C4 are used to control primary stream. */ - /*OUTREG32(PRI_STREAM_FBUF_ADDR0,0x80000000);*/ - OUTREG32(PRI_STREAM_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM_FBUF_ADDR1,0x00000000); - /*OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x80000000);*/ - OUTREG32(PRI_STREAM2_FBUF_ADDR0,0x00000000); - OUTREG32(PRI_STREAM2_FBUF_ADDR1,0x00000000); + + OUTREG32(PRI_STREAM_FBUF_ADDR0,pScrn->fbOffset | 0x80000000); + OUTREG32(PRI_STREAM_FBUF_ADDR1,pScrn->fbOffset); + OUTREG32(PRI_STREAM2_FBUF_ADDR0,pScrn->fbOffset | 0x80000000); + OUTREG32(PRI_STREAM2_FBUF_ADDR1,pScrn->fbOffset); + + OUTREG32(0x8128, 0xFFFFFFFFL); OUTREG32(0x812C, 0xFFFFFFFFL); Index: savage_bci.h =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_bci.h,v retrieving revision 1.2 diff -u -r1.2 savage_bci.h --- savage_bci.h 22 Feb 2004 16:14:42 -0000 1.2 +++ savage_bci.h 24 Jul 2004 22:15:36 -0000 @@ -20,15 +20,14 @@ #define TILE_FORMAT_LINEAR 0 #define TILE_TEXTURE 2 #define TILE_DESTINATION 1 -#define TILE_FORMAT_DESTINATION16 2 -#define TILE_FORMAT_DESTINATION32 3 +#define TILE_FORMAT_16BPP 2 +#define TILE_FORMAT_32BPP 3 /* BD - BCI enable */ /* savage4, MX, IX, 3D */ #define BCI_ENABLE 8 -/* twister, prosavage */ -/* not sure which one supersavage fits into */ -#define BCI_ENABLE_TWISTER 0 +/* prosavage, supersavage, DDR, 2000? */ +#define BCI_ENABLE_TWISTER 0 #define S3_BIG_ENDIAN 4 #define S3_LITTLE_ENDIAN 0 Index: savage_cursor.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_cursor.c,v retrieving revision 1.2 diff -u -r1.2 savage_cursor.c --- savage_cursor.c 22 Feb 2004 16:14:42 -0000 1.2 +++ savage_cursor.c 24 Jul 2004 22:15:37 -0000 @@ -95,21 +95,29 @@ void SavageShowCursor(ScrnInfoPtr pScrn) { + SavagePtr psav = SAVPTR(pScrn); + /* Turn cursor on. */ - outCRReg( 0x45, inCRReg(0x45) | 0x01 ); + outCRReg( 0x45, inCRReg(0x45) | 0x01 ); /* cursor1 bit 0*/ + if (psav->Duoview) + outCRReg( 0x45, inCRReg(0x45) | 0x04 ); /* cursor2 bit 2*/ } void SavageHideCursor(ScrnInfoPtr pScrn) { + SavagePtr psav = SAVPTR(pScrn); + /* Turn cursor off. */ - if( S3_SAVAGE4_SERIES( SAVPTR(pScrn)->Chipset ) ) + if( S3_SAVAGE4_SERIES( psav->Chipset ) ) { waitHSync(5); } - outCRReg( 0x45, inCRReg(0x45) & 0xfe ); + outCRReg( 0x45, inCRReg(0x45) & 0xfe ); /* cursor1 */ + if (psav->Duoview) + outCRReg( 0x45, inCRReg(0x45) & 0xfb ); /* cursor2 */ } static void @@ -119,10 +127,21 @@ { SavagePtr psav = SAVPTR(pScrn); + /* cursor 1 */ /* Set cursor location in frame buffer. */ outCRReg( 0x4d, (0xff & psav->CursorKByte)); outCRReg( 0x4c, (0xff00 & psav->CursorKByte) >> 8); + + /* cursor 2 */ + if (psav->Duoview) { + SelectIGA2(); + /* Set cursor location in frame buffer. */ + outCRReg( 0x4d, (0xff & psav->CursorKByte)); + outCRReg( 0x4c, (0xff00 & psav->CursorKByte) >> 8); + SelectIGA1(); + } + /* Upload the cursor image to the frame buffer. */ memcpy(psav->FBBase + psav->CursorKByte * 1024, src, 1024); @@ -142,9 +161,10 @@ int x, int y) { + SavagePtr psav = SAVPTR(pScrn); unsigned char xoff, yoff; - if( S3_SAVAGE4_SERIES( SAVPTR(pScrn)->Chipset ) ) + if( S3_SAVAGE4_SERIES( psav->Chipset ) ) { waitHSync(5); } @@ -177,6 +197,7 @@ yoff = 0; } + /* cursor 1 */ /* This is the recomended order to move the cursor */ outCRReg( 0x46, (x & 0xff00)>>8 ); outCRReg( 0x47, (x & 0xff) ); @@ -184,6 +205,20 @@ outCRReg( 0x4e, xoff ); outCRReg( 0x4f, yoff ); outCRReg( 0x48, (y & 0xff00)>>8 ); + + if (psav->Duoview) { + /* cursor 2 */ + SelectIGA2(); + /* This is the recomended order to move the cursor */ + outCRReg( 0x46, (x & 0xff00)>>8 ); + outCRReg( 0x47, (x & 0xff) ); + outCRReg( 0x49, (y & 0xff) ); + outCRReg( 0x4e, xoff ); + outCRReg( 0x4f, yoff ); + outCRReg( 0x48, (y & 0xff00)>>8 ); + SelectIGA1(); + } + } @@ -196,6 +231,8 @@ SavagePtr psav = SAVPTR(pScrn); Bool bNeedExtra = FALSE; + UnLockExtRegs(); + /* Clock doubled modes need an extra cursor stack write. */ bNeedExtra = @@ -221,6 +258,27 @@ outCRReg(0x4b, bg); outCRReg(0x4b, bg >> 8); outCRReg(0x4b, bg >> 16); + + if (psav->Duoview) { + /* cursor 2 */ + /* Reset the cursor color stack pointer */ + inCRReg(0x45); + SelectIGA2(); + /* Write low, mid, high bytes - foreground */ + outCRReg(0x4a, fg); + outCRReg(0x4a, fg >> 8); + outCRReg(0x4a, fg >> 16); + SelectIGA1(); + /* Reset the cursor color stack pointer */ + inCRReg(0x45); + /* Write low, mid, high bytes - background */ + SelectIGA2(); + outCRReg(0x4b, bg); + outCRReg(0x4b, bg >> 8); + outCRReg(0x4b, bg >> 16); + SelectIGA1(); + } + return; } else if( (pScrn->depth == 15) || (pScrn->depth == 16) ) @@ -244,19 +302,54 @@ inCRReg( 0x45 ); outCRReg( 0x4a, fg ); outCRReg( 0x4a, fg>>8 ); + + if (psav->Duoview) { + /* cursor 2 */ + inCRReg( 0x45 ); + SelectIGA2(); + outCRReg( 0x4a, fg ); + outCRReg( 0x4a, fg>>8 ); + SelectIGA1(); + } + if( bNeedExtra ) { outCRReg( 0x4a, fg ); outCRReg( 0x4a, fg>>8 ); + + if (psav->Duoview) { + SelectIGA2(); + outCRReg( 0x4a, fg ); + outCRReg( 0x4a, fg>>8 ); + SelectIGA1(); + } } /* Reset the cursor color stack pointer */ inCRReg( 0x45 ); outCRReg( 0x4b, bg ); outCRReg( 0x4b, bg>>8 ); + + if (psav->Duoview) { + /* cursor 2 */ + inCRReg( 0x45 ); + SelectIGA2(); + outCRReg( 0x4b, bg ); + outCRReg( 0x4b, bg>>8 ); + SelectIGA1(); + } + if( bNeedExtra ) { outCRReg( 0x4b, bg ); outCRReg( 0x4b, bg>>8 ); + + if (psav->Duoview) { + /* cursor 2 */ + SelectIGA2(); + outCRReg( 0x4b, bg ); + outCRReg( 0x4b, bg>>8 ); + SelectIGA1(); + } } } else if( pScrn->depth == 8 ) @@ -271,5 +364,23 @@ /* Write background */ outCRReg(0x4b, bg); outCRReg(0x4b, bg); + + if (psav->Duoview) { + /* cursor 2 */ + /* Reset the cursor color stack pointer */ + inCRReg(0x45); + SelectIGA2(); + /* Write foreground */ + outCRReg(0x4a, fg); + outCRReg(0x4a, fg); + SelectIGA1(); + /* Reset the cursor color stack pointer */ + inCRReg(0x45); + SelectIGA2(); + /* Write background */ + outCRReg(0x4b, bg); + outCRReg(0x4b, bg); + SelectIGA1(); + } } } Index: savage_dri.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_dri.c,v retrieving revision 1.3 diff -u -r1.3 savage_dri.c --- savage_dri.c 23 Mar 2004 21:11:37 -0000 1.3 +++ savage_dri.c 24 Jul 2004 22:15:38 -0000 @@ -704,8 +704,6 @@ int size,numbuffer,i; savageAgpBufferPtr agpbuffer; - /* FIXME: Make these configurable... - */ /*pSAVAGEDRIServer->agp.size = 16 * 1024 * 1024;*/ pSAVAGEDRIServer->agp.size = psav->agpSize * 1024 * 1024; pSAVAGEDRIServer->agp.offset = pSAVAGEDRIServer->agp.size; @@ -1303,97 +1301,81 @@ pSAVAGEDRI->frontPitch = pSAVAGEDRIServer->frontPitch; pSAVAGEDRI->IsfrontTiled = psav->bTiled; /* AGD: was 0 */ + if(pSAVAGEDRI->cpp==2) + TileStride = (pSAVAGEDRI->width+63)&(~63); + else + TileStride = (pSAVAGEDRI->width+31)&(~31); + if(pSAVAGEDRI->IsfrontTiled) { - if(pSAVAGEDRI->cpp==2) - TileStride = (pSAVAGEDRI->width+63)&(~63); - else - TileStride = (pSAVAGEDRI->width+31)&(~31); - if ((psav->Chipset == S3_TWISTER) - || (psav->Chipset == S3_PROSAVAGE) + if ((psav->Chipset == S3_PROSAVAGE) || (psav->Chipset == S3_PROSAVAGEDDR) + || (psav->Chipset == S3_TWISTER) || (psav->Chipset == S3_SUPERSAVAGE)) { - pSAVAGEDRI->frontBitmapDesc = 0x10000000 | /* block write disabled */ + pSAVAGEDRI->frontBitmapDesc = BCI_BD_BW_DISABLE | /* block write disabled */ (1<<24) | /* destination tile format */ (pScrn->bitsPerPixel<<16) | /* bpp */ TileStride; /* stride */ - } else { - pSAVAGEDRI->frontBitmapDesc = 0x10000000 | /* block write disabled */ + pSAVAGEDRI->frontPitch = TileStride; /* is this needed? */ + } else { /* twister seems to use this format too */ + pSAVAGEDRI->frontBitmapDesc = BCI_BD_BW_DISABLE | /* block write disabled */ ((pSAVAGEDRI->cpp==2)? BCI_BD_TILE_16:BCI_BD_TILE_32) | /*16/32 bpp tile format */ (pScrn->bitsPerPixel<<16) | /* bpp */ TileStride; /* stride */ - pSAVAGEDRI->frontPitch = TileStride; + pSAVAGEDRI->frontPitch = TileStride; /* is this needed? */ } } else { - pSAVAGEDRI->frontBitmapDesc = 0x10000000 | /* AGD: block write should be disabled: was 0x00000000 */ + pSAVAGEDRI->frontBitmapDesc = BCI_BD_BW_DISABLE | pScrn->bitsPerPixel<<16 | pSAVAGEDRI->width; } - - pSAVAGEDRI->backOffset = pSAVAGEDRIServer->backOffset; - pSAVAGEDRI->backbufferSize = pSAVAGEDRIServer->backbufferSize; - pSAVAGEDRI->backbuffer = psav->FrameBufferBase + - pSAVAGEDRI->backOffset; - pSAVAGEDRI->backPitch = pSAVAGEDRIServer->backPitch; { - if(pSAVAGEDRI->cpp==2) - TileStride = (pSAVAGEDRI->width+63)&(~63); - else - TileStride = (pSAVAGEDRI->width+31)&(~31); - if ((psav->Chipset == S3_TWISTER) - || (psav->Chipset == S3_PROSAVAGE) + if ((psav->Chipset == S3_PROSAVAGE) || (psav->Chipset == S3_PROSAVAGEDDR) - || (psav->Chipset == S3_SUPERSAVAGE)) /* AGD: supersavage may work like savage4/MX/IX, I just don't know. */ - { /* It's here since the 2D driver sets it up like prosavage */ - pSAVAGEDRI->backBitmapDesc = 0x10000000 | + || (psav->Chipset == S3_TWISTER) + || (psav->Chipset == S3_SUPERSAVAGE)) + { + pSAVAGEDRI->backBitmapDesc = BCI_BD_BW_DISABLE | (1<<24) | (pScrn->bitsPerPixel<<16) | TileStride; - } else { - pSAVAGEDRI->backBitmapDesc = 0x10000000 | + pSAVAGEDRI->depthBitmapDesc = BCI_BD_BW_DISABLE | + (1<<24) | + (pScrn->bitsPerPixel<<16) | + TileStride; + } else { /* twister seems to use this format too */ + pSAVAGEDRI->backBitmapDesc = BCI_BD_BW_DISABLE | ((pSAVAGEDRI->cpp==2)? BCI_BD_TILE_16:BCI_BD_TILE_32) | (pScrn->bitsPerPixel<<16) | TileStride; + pSAVAGEDRI->depthBitmapDesc = BCI_BD_BW_DISABLE | + ((pSAVAGEDRI->zpp==2)? + BCI_BD_TILE_16:BCI_BD_TILE_32) | + (pScrn->bitsPerPixel<<16) | + TileStride; } } + pSAVAGEDRI->backOffset = pSAVAGEDRIServer->backOffset; + pSAVAGEDRI->backbufferSize = pSAVAGEDRIServer->backbufferSize; + pSAVAGEDRI->backbuffer = psav->FrameBufferBase + + pSAVAGEDRI->backOffset; + pSAVAGEDRI->backPitch = pSAVAGEDRIServer->backPitch; + pSAVAGEDRI->depthOffset = pSAVAGEDRIServer->depthOffset; pSAVAGEDRI->depthbufferSize = pSAVAGEDRIServer->depthbufferSize; pSAVAGEDRI->depthbuffer = psav->FrameBufferBase + pSAVAGEDRI->depthOffset; pSAVAGEDRI->depthPitch = pSAVAGEDRIServer->depthPitch; - { - if(pSAVAGEDRI->zpp==2) - TileStride = (pSAVAGEDRI->width+63)&(~63); - else - TileStride = (pSAVAGEDRI->width+31)&(~31); - - if ((psav->Chipset == S3_TWISTER) - || (psav->Chipset == S3_PROSAVAGE) - || (psav->Chipset == S3_PROSAVAGEDDR) - || (psav->Chipset == S3_SUPERSAVAGE)) - { - pSAVAGEDRI->depthBitmapDesc = 0x10000000 | - (1<<24) | - (pScrn->bitsPerPixel<<16) | - TileStride; - } else { - pSAVAGEDRI->depthBitmapDesc = 0x10000000 | - ((pSAVAGEDRI->zpp==2)? - BCI_BD_TILE_16:BCI_BD_TILE_32) | - (pScrn->bitsPerPixel<<16) | - TileStride; - } - } pSAVAGEDRI->textureOffset = pSAVAGEDRIServer->textureOffset; pSAVAGEDRI->textures = psav->FrameBufferBase + Index: savage_driver.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.c,v retrieving revision 1.22 diff -u -r1.22 savage_driver.c --- savage_driver.c 26 Mar 2004 22:20:40 -0000 1.22 +++ savage_driver.c 24 Jul 2004 22:15:40 -0000 @@ -86,7 +86,6 @@ extern ScrnInfoPtr gpScrn; -#define iabs(a) ((int)(a)>0?(a):(-(a))) #define DRIVER_NAME "savage" #define DRIVER_VERSION "1.1.27a" @@ -213,6 +212,11 @@ ,OPTION_BCI_FOR_XV ,OPTION_AGP_MODE ,OPTION_AGP_SIZE + ,OPTION_DUOVIEW + ,OPTION_CRT2REFRESH + ,OPTION_CRT2XRES + ,OPTION_CRT2YRES + ,OPTION_CRT2REL } SavageOpts; @@ -237,6 +241,11 @@ { OPTION_BCI_FOR_XV, "BCIforXv", OPTV_BOOLEAN, {0}, FALSE }, { OPTION_AGP_MODE, "AGPMode", OPTV_INTEGER, {0}, FALSE }, { OPTION_AGP_SIZE, "AGPSize", OPTV_INTEGER, {0}, FALSE }, + { OPTION_DUOVIEW, "Duoview", OPTV_BOOLEAN, {0}, FALSE }, + { OPTION_CRT2REFRESH, "CRT2Refresh", OPTV_INTEGER, {0}, FALSE }, + { OPTION_CRT2XRES, "CRT2XRes", OPTV_INTEGER, {0}, FALSE }, + { OPTION_CRT2YRES, "CRT2YRes", OPTV_INTEGER, {0}, FALSE }, + { OPTION_CRT2REL, "CRT2Rel", OPTV_INTEGER, {0}, FALSE }, { -1, NULL, OPTV_NONE, {0}, FALSE } }; @@ -1098,6 +1107,44 @@ "Option: %s use of the BCI for Xv\n",(psav->BCIforXv?"Enable":"Disable")); } + psav->Duoview = FALSE; + if( xf86GetOptValBool( psav->Options, OPTION_DUOVIEW, &psav->Duoview)) { + if (!psav->UseBIOS) { + psav->Duoview = FALSE; + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "Duoview requires BIOS mode setting\n" ); + } else { + xf86DrvMsg( pScrn->scrnIndex, X_CONFIG, + "Option: Duoview enabled\n" ); + } + } + + psav->CRT2Refresh = 60; + if( xf86GetOptValInteger( psav->Options, OPTION_CRT2REFRESH, &psav->CRT2Refresh)) { + if ((psav->CRT2Refresh > 100) ||(psav->CRT2Refresh < 0)) { + psav->CRT2Refresh = 60; + xf86DrvMsg( pScrn->scrnIndex, X_ERROR, + "CRT2 Refresh rate out of range: default 60\n" ); + } else { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "CRT2 Refresh rate: %d\n", psav->CRT2Refresh); + } + } + psav->CRT2XRes = 640; + psav->CRT2YRes = 480; + if( xf86GetOptValInteger( psav->Options, OPTION_CRT2XRES, &psav->CRT2XRes)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Option: CRT2 Mode X res: %d\n", psav->CRT2XRes); + } + if( xf86GetOptValInteger( psav->Options, OPTION_CRT2YRES, &psav->CRT2YRes)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Option: CRT2 Mode Y res: %d\n", psav->CRT2YRes); + } + if( xf86GetOptValInteger( psav->Options, OPTION_CRT2REL, &psav->CRT2Relation)) { + xf86DrvMsg(pScrn->scrnIndex, X_CONFIG, + "Option: CRT2 relation: %d\n", psav->CRT2Relation); + } + /* Add more options here. */ if (pScrn->numEntities > 1) { @@ -1310,16 +1357,14 @@ * The Savage4 and ProSavage have COB coherency bugs which render * the buffer useless. */ - /* - psav->cobIndex = 2; - psav->cobSize = 0x8000 << psav->cobIndex; - */ psav->cobIndex = 0; psav->cobSize = 0; } else { /* We use 128kB for the COB on all other chips. */ psav->cobSize = 0x20000; - if (S3_SAVAGE3D_SERIES(psav->Chipset)) { + if (S3_SAVAGE3D_SERIES(psav->Chipset) + || (psav->Chipset == S3_TWISTER)) /* twister seems to use 7? */ + { psav->cobIndex = 7; /* rev.A savage4 also uses 7 */ } else { psav->cobIndex = 2; @@ -1540,39 +1585,6 @@ } #endif - clockRanges = xnfalloc(sizeof(ClockRange)); - clockRanges->next = NULL; - clockRanges->minClock = psav->minClock; - clockRanges->maxClock = psav->maxClock; - clockRanges->clockIndex = -1; - clockRanges->interlaceAllowed = TRUE; - clockRanges->doubleScanAllowed = TRUE; - clockRanges->ClockDivFactor = 1.0; - clockRanges->ClockMulFactor = 1.0; - - i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, - pScrn->display->modes, clockRanges, NULL, - 256, 2048, 16 * pScrn->bitsPerPixel, - 128, 2048, - pScrn->virtualX, pScrn->virtualY, - psav->videoRambytes, LOOKUP_BEST_REFRESH); - - if (i == -1) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86ValidateModes failure\n"); - SavageFreeRec(pScrn); - vbeFree(psav->pVbe); - return FALSE; - } - - xf86PruneDriverModes(pScrn); - - if (i == 0 || pScrn->modes == NULL) { - xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); - SavageFreeRec(pScrn); - vbeFree(psav->pVbe); - return FALSE; - } - if( psav->UseBIOS ) { /* Go probe the BIOS for all the modes and refreshes at this depth. */ @@ -1615,6 +1627,39 @@ } } + clockRanges = xnfalloc(sizeof(ClockRange)); + clockRanges->next = NULL; + clockRanges->minClock = psav->minClock; + clockRanges->maxClock = psav->maxClock; + clockRanges->clockIndex = -1; + clockRanges->interlaceAllowed = TRUE; + clockRanges->doubleScanAllowed = TRUE; + clockRanges->ClockDivFactor = 1.0; + clockRanges->ClockMulFactor = 1.0; + + i = xf86ValidateModes(pScrn, pScrn->monitor->Modes, + pScrn->display->modes, clockRanges, NULL, + 256, 2048, 16 * pScrn->bitsPerPixel, + 128, 2048, + pScrn->virtualX, pScrn->virtualY, + psav->videoRambytes, LOOKUP_BEST_REFRESH); + + if (i == -1) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86ValidateModes failure\n"); + SavageFreeRec(pScrn); + vbeFree(psav->pVbe); + return FALSE; + } + + xf86PruneDriverModes(pScrn); + + if (i == 0 || pScrn->modes == NULL) { + xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "No valid modes found\n"); + SavageFreeRec(pScrn); + vbeFree(psav->pVbe); + return FALSE; + } + xf86SetCrtcForModes(pScrn, INTERLACE_HALVE_V); pScrn->currentMode = pScrn->modes; xf86PrintModes(pScrn); @@ -1935,6 +1980,11 @@ unsigned short cr6d; unsigned short cr79 = 0; + /* make sure the start address has been reset to 0 */ + OUTREG16(CRT_ADDRESS_REG, (ushort) 0x0D); + OUTREG16(CRT_ADDRESS_REG, (ushort) 0x0C); + OUTREG16(CRT_ADDRESS_REG, (ushort) 0x69); + /* Set up the mode. Don't clear video RAM. */ SavageSetVESAMode( psav, restore->mode | 0x8000, restore->refresh ); @@ -2051,6 +2101,17 @@ VGAOUT16(vgaCRIndex, ((width & 0xff) << 8) | 0x13 ); VGAOUT16(vgaCRIndex, ((width & 0x300) << 4) | 0x51 ); + if (psav->Duoview) { + SelectIGA2(); + VGAOUT8(vgaCRIndex, 0x50); + VGAOUT8(vgaCRReg, VGAIN8(vgaCRReg) | 0xC1); +/* FIXME - change pitch to CRT2XRes - is this reg paired??? */ + width = (pScrn->displayWidth * (pScrn->bitsPerPixel / 8)) >> 3; + VGAOUT16(vgaCRIndex, ((width & 0xff) << 8) | 0x13 ); + VGAOUT16(vgaCRIndex, ((width & 0x300) << 4) | 0x51 ); + SelectIGA1(); + } + /* Some non-S3 BIOSes enable block write even on non-SGRAM devices. */ switch( psav->Chipset ) @@ -2131,7 +2192,7 @@ VGAOUT8(vgaCRIndex, 0x67); cr67 = VGAIN8(vgaCRReg); /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */ - VGAOUT8(vgaCRReg, restore->CR67 & ~0xf1); /* no streams for new and old streams engines */ + VGAOUT8(vgaCRReg, restore->CR67 & ~0x0e); /* no streams for new and old streams engines */ /* restore extended regs */ VGAOUT8(vgaCRIndex, 0x66); @@ -2195,7 +2256,7 @@ /* restore the desired video mode with cr67 */ VGAOUT8(vgaCRIndex, 0x67); /*VGAOUT8(vgaCRReg, restore->CR67 & ~0x0c);*/ /* no STREAMS yet */ - VGAOUT8(vgaCRReg, restore->CR67 & ~0xf1); /* no streams for new and old streams engines */ + VGAOUT8(vgaCRReg, restore->CR67 & ~0x0e); /* no streams for new and old streams engines */ /* other mode timing and extended regs */ VGAOUT8(vgaCRIndex, 0x34); @@ -2785,6 +2846,7 @@ { ScrnInfoPtr pScrn = xf86Screens[index]; SavagePtr psav = SAVPTR(pScrn); + int refresh; TRACE(("SavageValidMode\n")); @@ -2800,16 +2862,18 @@ return MODE_VIRTUAL_Y; } - if( - !psav->CrtOnly && - psav->PanelX && - ( - (pMode->HDisplay > psav->PanelX) || - (pMode->VDisplay > psav->PanelY) - ) - ) - return MODE_PANEL; - + if( !psav->CrtOnly && psav->PanelX && + ((pMode->HDisplay > psav->PanelX) || + (pMode->VDisplay > psav->PanelY))) + return MODE_PANEL; +#if 1 + if (psav->UseBIOS) { + refresh = (pMode->Clock * 1000) / (pMode->HTotal * pMode->VTotal); + return (SavageMatchBiosMode(pScrn,pMode->HDisplay, + pMode->VDisplay, + refresh,NULL,NULL)); + } +#endif return MODE_OK; } @@ -2915,63 +2979,24 @@ if( psav->UseBIOS ) { int refresh; - SavageModeEntryPtr pmt; - - /* Scan through our BIOS list to locate the closest valid mode. */ - - /* If we ever break 4GHz clocks on video boards, we'll need to - * change this. - */ - + unsigned int newmode=0, newrefresh=0; refresh = (mode->Clock * 1000) / (mode->HTotal * mode->VTotal); -#ifdef EXTENDED_DEBUG - ErrorF( "Desired refresh rate = %dHz\n", refresh ); -#endif - - for( i = 0, pmt = psav->ModeTable->Modes; - i < psav->ModeTable->NumModes; - i++, pmt++ ) - { - if( (pmt->Width == mode->HDisplay) && - (pmt->Height == mode->VDisplay) ) - { - int jDelta = 99; - int jBest = 0; - - /* We have an acceptable mode. Find a refresh rate. */ - - new->mode = pmt->VesaMode; - for( j = 0; j < pmt->RefreshCount; j++ ) - { - if( pmt->RefreshRate[j] == refresh ) - { - /* Exact match. */ - jBest = j; - break; - } - else if( iabs(pmt->RefreshRate[j] - refresh) < jDelta ) - { - jDelta = iabs(pmt->RefreshRate[j] - refresh); - jBest = j; - } - } - - new->refresh = pmt->RefreshRate[jBest]; - break; - } + SavageMatchBiosMode(pScrn,mode->HDisplay,mode->VDisplay,refresh, + &newmode,&newrefresh); + new->mode = newmode; + new->refresh = newrefresh; + + if (psav->Duoview) { + newmode = 0; + newrefresh = 0; + refresh = psav->CRT2Refresh; + SavageMatchBiosMode(pScrn,psav->CRT2XRes,psav->CRT2YRes,refresh, + &newmode,&newrefresh); + psav->CRT2BIOSMode = newmode; + psav->CRT2Refresh = newrefresh; } - if( new->mode ) { - /* Success: we found a match in the BIOS. */ - xf86DrvMsg(pScrn->scrnIndex, X_PROBED, - "Chose mode %x at %dHz.\n", new->mode, new->refresh ); - } - else { - xf86DrvMsg(pScrn->scrnIndex, X_PROBED, - "No suitable BIOS mode found for %dx%d %dMHz.\n", - mode->HDisplay, mode->VDisplay, mode->Clock/1000 ); - } } if( !new->mode ) { @@ -3228,9 +3253,15 @@ SavagePtr psav = SAVPTR(pScrn); DisplayModePtr currentMode = pScrn->currentMode; int address=0,top=0,left=0; + int address2=0,top2=0,left2=0,x2=0,y2=0,crtc1_base=0,crtc2_base=0; TRACE(("SavageAdjustFrame(%d,%d,%x)\n", x, y, flags)); + if (psav->Duoview) { + x = 0; + y = 0; + } + if (!psav->bTiled) { left = x - x % 64; top = y; @@ -3246,16 +3277,93 @@ address = top * psav->lDelta + left * TILE_SIZE_BYTE / TILEWIDTH_32BPP; } } + + if (psav->Duoview) { + if (psav->CRT2Relation == 0) { /* left */ + x2 = x + psav->CRT2XRes; + y2 = y; + } else if (psav->CRT2Relation == 1) { /* right */ + x2 = x + psav->CRT2XRes; + y2 = y; + } else if (psav->CRT2Relation == 2) { /* above */ + x2 = x; + y2 = y + psav->CRT2YRes; + } else if (psav->CRT2Relation == 3) { /* below */ + x2 = x; + y2 = y + psav->CRT2YRes; + } else if (psav->CRT2Relation == 4) { /* clone */ + x2 = x; + y2 = y; + } + if (!psav->bTiled) { + left2 = x2 - x2 % 64; + top2 = y2; + address2 = (top2 * psav->lDelta) + left2 * (pScrn->bitsPerPixel >> 3); + address2 = (address2 >> 5) << 5; + } else { + top2 = y2 - y2 % TILEHEIGHT; + if (pScrn->bitsPerPixel == 16) { + left2 = x2 - x2 % TILEWIDTH_16BPP; + address2 = top2 * psav->lDelta + left2 * TILE_SIZE_BYTE / TILEWIDTH_16BPP; + } else if (pScrn->bitsPerPixel == 32) { + left = x2 - x2 % TILEWIDTH_32BPP; + address2 = top2 * psav->lDelta + left2 * TILE_SIZE_BYTE / TILEWIDTH_32BPP; + } + } + } + address += pScrn->fbOffset; + address2 += pScrn->fbOffset; + + if (psav->Duoview) { + if (psav->CRT2Relation == 0) { /* left */ + crtc1_base = address2; + crtc2_base = address; + } else if (psav->CRT2Relation == 1) { /* right */ + crtc1_base = address; + crtc2_base = address2; + } else if (psav->CRT2Relation == 2) { /* above */ + crtc1_base = address2; + crtc2_base = address; + } else if (psav->CRT2Relation == 3) { /* below */ + crtc1_base = address; + crtc2_base = address2; + } else if (psav->CRT2Relation == 4) { /* clone */ + crtc1_base = address; + crtc2_base = address2; + } + } else { + crtc1_base = address; + crtc2_base = address; + } + /* * because we align the viewport to the width and height of one tile - * we shoud update the locate of frame + * we should update the locate of frame */ pScrn->frameX0 = left; pScrn->frameY0 = top; pScrn->frameX1 = left + currentMode->HDisplay - 1; - pScrn->frameY1 = top+ currentMode->VDisplay - 1; + pScrn->frameY1 = top + currentMode->VDisplay - 1; + + if (psav->Chipset == S3_SAVAGE_MX) { + OUTREG32(PRI_STREAM_FBUF_ADDR0, crtc1_base | 0xFFFFFFFC); + OUTREG32(PRI_STREAM_FBUF_ADDR1, crtc1_base & 0xFFFFFFFC);/* IGA1 */ + OUTREG32(PRI_STREAM2_FBUF_ADDR0, ((crtc2_base & 0x01FFFFFF) | 0x80000000));/* IGA2 */ + OUTREG32(PRI_STREAM2_FBUF_ADDR1, ((crtc2_base & 0x01FFFFFF) | 0x80000000)); + } else if (psav->Chipset == S3_SUPERSAVAGE) { + /* IGA1 */ + OUTREG32(PRI_STREAM_FBUF_ADDR0, crtc1_base | 0xFFFFFFF8); + OUTREG32(PRI_STREAM_FBUF_ADDR1, crtc1_base & 0xFFFFFFF8); + /* IGA2 */ + OUTREG32(PRI_STREAM2_FBUF_ADDR0, ((crtc2_base & 0xFFFFFFF8) | 0x80000000)); + OUTREG32(PRI_STREAM2_FBUF_ADDR1, crtc2_base & 0xFFFFFFF8); + } else { + OUTREG32(PRI_STREAM_FBUF_ADDR0, crtc1_base | 0xFFFFFFFC); + OUTREG32(PRI_STREAM_FBUF_ADDR1, crtc1_base | 0x80000000); + } +#if 0 if (S3_SAVAGE_MOBILE_SERIES(psav->Chipset)) { OUTREG32(PRI_STREAM_FBUF_ADDR0,address | 0xFFFFFFFC); /* IGA1 */ OUTREG32(PRI_STREAM_FBUF_ADDR1,address | 0x80000000); @@ -3265,7 +3373,10 @@ OUTREG32(PRI_STREAM_FBUF_ADDR0,address | 0xFFFFFFFC); OUTREG32(PRI_STREAM_FBUF_ADDR1,address | 0x80000000); } - +#endif + + /* SavagePrintRegs(pScrn); */ + return; } @@ -3555,7 +3666,7 @@ /* This function is used to debug, it prints out the contents of s3 regs */ - +#if 0 void SavagePrintRegs(ScrnInfoPtr pScrn) { @@ -3584,7 +3695,55 @@ ErrorF("\n\n"); } +#endif +/* This function is used to debug, it prints out the contents of s3 regs */ + +void +SavagePrintRegs(ScrnInfoPtr pScrn) +{ + SavagePtr psav = SAVPTR(pScrn); + unsigned char i; + int vgaCRIndex = 0x3d4; + int vgaCRReg = 0x3d5; + UnLockExtRegs(); +#if 0 + if (psav->IsSecondary) + ErrorF("\n\nScreen1"); + else + ErrorF("\n\nScreen0"); +#endif + ErrorF( "\n\nSR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF" ); + + for( i = 0; i < 0x70; i++ ) { + if( !(i % 16) ) + ErrorF( "\nSR%xx ", i >> 4 ); + VGAOUT8( 0x3c4, i ); + ErrorF( " %02x", VGAIN8(0x3c5) ); + } + ErrorF("\n\ncrtc1"); + ErrorF( "\n\nCR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF" ); + + for( i = 0; i < 0xB7; i++ ) { + if( !(i % 16) ) + ErrorF( "\nCR%xx ", i >> 4 ); + VGAOUT8( vgaCRIndex, i ); + ErrorF( " %02x", VGAIN8(vgaCRReg) ); + } + ErrorF("\n\ncrtc2"); + ErrorF( "\n\nCR x0 x1 x2 x3 x4 x5 x6 x7 x8 x9 xA xB xC xD xE xF" ); + + SelectIGA2(); + for( i = 0; i < 0xB7; i++ ) { + if( !(i % 16) ) + ErrorF( "\nCR%xx ", i >> 4 ); + VGAOUT8( vgaCRIndex, i ); + ErrorF( " %02x", VGAIN8(vgaCRReg) ); + } + SelectIGA1(); + + ErrorF("\n\n"); +} static void SavageDPMS(ScrnInfoPtr pScrn, int mode, int flags) { @@ -3620,10 +3779,7 @@ break; } - if ( (!psav->CrtOnly) && psav->UseBIOS && psav->PanelX ) { - SavageSetPanelEnabled(psav, (mode == DPMSModeOn)); - } - else if ((!psav->CrtOnly) && psav->PanelX) { + if ((!psav->CrtOnly) && psav->PanelX) { switch (mode) { case DPMSModeOn: VGAOUT8(0x3c4, 0x31); /* SR31 bit 4 - FP enable */ @@ -3767,7 +3923,7 @@ OUTREG32(PRI_STREAM_FBUF_ADDR1,0); OUTREG8(CRT_ADDRESS_REG, 0x67); cr67 = INREG8(CRT_DATA_REG); - cr67 &= ~0x0c; /* CR67[2] = 1 : enable stream 1 */ + cr67 &= ~0x0c; OUTREG8(CRT_DATA_REG, cr67); OUTREG8(CRT_ADDRESS_REG, 0x69); cr69 = INREG8(CRT_DATA_REG); Index: savage_driver.h =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_driver.h,v retrieving revision 1.12 diff -u -r1.12 savage_driver.h --- savage_driver.h 23 Mar 2004 21:11:37 -0000 1.12 +++ savage_driver.h 24 Jul 2004 22:15:40 -0000 @@ -348,6 +348,18 @@ StatInfoRec StatInfo; /* save the SVGA state */ + Bool Duoview; + int CRT2Refresh; + int CRT2BIOSMode; + int CRT2XRes; + int CRT2YRes; + int CRT2Relation; /* 0 = left of crtc1 + 1 = right + 2 = above + 3 = below + 4 = clone + */ + } SavageRec, *SavagePtr; /* Video flags. */ @@ -434,6 +446,8 @@ void SavageSetPanelEnabled( SavagePtr psav, Bool active ); void SavageFreeBIOSModeTable( SavagePtr psav, SavageModeTablePtr* ppTable ); SavageModeTablePtr SavageGetBIOSModeTable( SavagePtr psav, int iDepth ); +ModeStatus SavageMatchBiosMode(ScrnInfoPtr pScrn,int width,int height,int refresh, + unsigned int *vesaMode,unsigned int *newRefresh); unsigned short SavageGetBIOSModes( SavagePtr psav, Index: savage_regs.h =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_regs.h,v retrieving revision 1.10 diff -u -r1.10 savage_regs.h --- savage_regs.h 2 Mar 2004 18:15:45 -0000 1.10 +++ savage_regs.h 24 Jul 2004 22:15:40 -0000 @@ -185,10 +185,21 @@ /* CR69[0] = 1 : Mem-mapped regs */ #define USE_MM_FOR_PRI_STREAM_OLD 0x01 +/* duoview */ #define SELECT_IGA1 0x4026 #define SELECT_IGA2_READS_WRITES 0x4f26 +#define SelectIGA1() \ +do { \ + OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA1); \ +} while (0) + +#define SelectIGA2() \ +do { \ + OUTREG16(SEQ_ADDRESS_REG,SELECT_IGA2_READS_WRITES); \ +} while (0) + #define MEM_PS1 0x10 /*CRCA_4 :Primary stream 1*/ #define MEM_PS2 0x20 /*CRCA_5 :Primary stream 2*/ #define MEM_SS1 0x40 /*CRCA_6 :Secondary stream 1*/ Index: savage_vbe.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_vbe.c,v retrieving revision 1.3 diff -u -r1.3 savage_vbe.c --- savage_vbe.c 22 Feb 2004 16:14:42 -0000 1.3 +++ savage_vbe.c 24 Jul 2004 22:15:40 -0000 @@ -3,6 +3,8 @@ #include "savage_driver.h" #include "savage_vbe.h" +#define iabs(a) ((int)(a)>0?(a):(-(a))) + #if X_BYTE_ORDER == X_LITTLE_ENDIAN #define B_O16(x) (x) #define B_O32(x) (x) @@ -16,6 +18,8 @@ Bool vbeModeInit( vbeInfoPtr, int ); static int SavageGetDevice( SavagePtr psav ); /*static int SavageGetTVType( SavagePtr psav );*/ +void SavageSetVESAModeCrtc1( SavagePtr psav, int n, int Refresh ); +void SavageSetVESAModeCrtc2( SavagePtr psav, int n, int Refresh ); static void SavageClearVM86Regs( xf86Int10InfoPtr pInt ) @@ -49,13 +53,82 @@ xf86ExecX86int10( psav->pInt10 ); } +void +SavageSetVESAModeCrtc1(SavagePtr psav, int n, int refresh) +{ + unsigned char byte; + + xf86Msg(X_INFO,"SavageSetVESAMode:mode=0x%x,refresh=%dHZ\n",n,refresh); + + SavageClearVM86Regs(psav->pInt10); + + /* set active displays. */ + psav->pInt10->ax = S3_EXTBIOS_INFO; + psav->pInt10->bx = S3_SET_ACTIVE_DISP; + psav->pInt10->cx = 0x83; /* lcd, crt, duoview */ + xf86ExecX86int10(psav->pInt10); + + SavageClearVM86Regs(psav->pInt10); + + /* Establish the refresh rate for this mode. */ + psav->pInt10->ax = S3_EXTBIOS_INFO; + psav->pInt10->bx = S3_SET_REFRESH; + psav->pInt10->cx = n & 0x1ff; + psav->pInt10->di = refresh & 0xffff; + xf86ExecX86int10(psav->pInt10); + + /* SR01:turn off screen */ + OUTREG8 (SEQ_ADDRESS_REG,0x01); + byte = INREG8(SEQ_DATA_REG) | 0x20; + OUTREG8(SEQ_DATA_REG,byte); + + psav->pInt10->ax = BIOS_SET_VBE_MODE; + psav->pInt10->bx = n; + xf86ExecX86int10(psav->pInt10); + +} + +void +SavageSetVESAModeCrtc2( SavagePtr psav, int n, int refresh ) +{ + SavageClearVM86Regs(psav->pInt10); + + UnLockExtRegs(); + + /* set crtc2, clone crtc1 for now */ + psav->pInt10->ax = S3_EXTBIOS_INFO; + psav->pInt10->bx = S3_ALT_SET_ACTIVE_DISP; + psav->pInt10->cx = 0x83; /* lcd, crt, duoview */ + psav->pInt10->dx = n & 0x1ff; + psav->pInt10->di = refresh & 0xffff; + xf86ExecX86int10(psav->pInt10); + +} +#if 0 +void +SavageSetVESAMode(SavagePtr psav, int n, int refresh) +{ + + SavageSetVESAModeCrtc1(psav, n, refresh); + SavageSetVESAModeCrtc2(psav, psav->CRT2BIOSMode, psav->CRT2Refresh); + +} +#endif + +#if 1 void SavageSetVESAMode( SavagePtr psav, int n, int Refresh ) { int iDevInfo; static int iCount = 0; + if (psav->Duoview) { + SavageSetVESAModeCrtc1(psav, n, Refresh); + SavageSetVESAModeCrtc2(psav, psav->CRT2BIOSMode, psav->CRT2Refresh); + return; + } + /* Get current display device status. */ iDevInfo = SavageGetDevice(psav); @@ -121,7 +194,7 @@ } #endif } - +#endif void SavageSetPanelEnabled( SavagePtr psav, Bool active ) @@ -319,3 +392,67 @@ return iModeCount; } + +ModeStatus SavageMatchBiosMode(ScrnInfoPtr pScrn,int width,int height,int refresh, + unsigned int *vesaMode,unsigned int *newRefresh) +{ + SavageModeEntryPtr pmt; + Bool found = FALSE; + SavagePtr psav = SAVPTR(pScrn); + int i,j; + + /* Scan through our BIOS list to locate the closest valid mode. */ + + /* + * If we ever break 4GHz clocks on video boards, we'll need to + * change this. + * refresh = (mode->Clock * 1000) / (mode->HTotal * mode->VTotal); + * now we use VRefresh directly,instead of by calculating from dot clock + */ + + for( i = 0, pmt = psav->ModeTable->Modes; + i < psav->ModeTable->NumModes; + i++, pmt++ ) + { + if( (pmt->Width == width) && + (pmt->Height == height) ) + { + int jDelta = 99; + int jBest = 0; + + /* We have an acceptable mode. Find a refresh rate. */ + if (vesaMode) + *vesaMode = pmt->VesaMode; + for( j = 0; j < pmt->RefreshCount; j++ ) + { + if( pmt->RefreshRate[j] == refresh ) + { + /* Exact match. */ + jBest = j; + break; + } + else if( iabs(pmt->RefreshRate[j] - refresh) < jDelta ) + { + jDelta = iabs(pmt->RefreshRate[j] - refresh); + jBest = j; + } + } + if (newRefresh) + *newRefresh = pmt->RefreshRate[jBest]; + found = TRUE; + break; + } + } + + if( found ) { + /* Success: we found a match in the BIOS. */ + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "Chose mode %x at %dHz.\n", vesaMode, newRefresh ); + return MODE_OK; + } else { + xf86DrvMsg(pScrn->scrnIndex, X_PROBED, + "No suitable BIOS mode found for %dx%d %dHz.\n", + width, height, refresh); + return MODE_NOMODE; + } +} Index: savage_vbe.h =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_vbe.h,v retrieving revision 1.1.1.2 diff -u -r1.1.1.2 savage_vbe.h --- savage_vbe.h 22 Oct 2002 13:40:41 -0000 1.1.1.2 +++ savage_vbe.h 24 Jul 2004 22:15:41 -0000 @@ -16,6 +16,58 @@ #ifndef _SAVAGEVBE_H #define _SAVAGEVBE_H +/* + * Common BIOS functions + */ + +#define BIOS_SET_VBE_MODE 0x4F02 +#define BIOS_GET_VBE_MODE 0x4F03 +#define BIOS_SVGA_STATE 0x4F04 +#define BIOS_LOG_SCANLINE 0x4F06 +#define BIOS_VBE_PM_SERVICE 0x4F10 +#define S3_EXTBIOS_INFO 0x4F14 /* S3 Extended BIOS services */ +#define BIOS_VBE_DDC 0x4F15 + +/************************************************************************* + * Defines for BIOS compliant with S3 (Mobile and Desktop) PCI Video + * Bios External Interface Specification, Core Revision 3.02+ + * + * e.g. used by Trio3D, GX-3 + *************************************************************************/ + +#define S3_GET_SVGA_BUF 0x0000 +#define S3_SAVE_SVGA_STATE 0x0001 +#define S3_RESTORE_SVGA_STATE 0x0002 +/* + * For S3_EXTBIOS_INFO (0x4F14) services + */ +#define S3_VBE_INFO 0x0000 /* fn0: Query S3/VBE info */ + +#define S3_SET_REFRESH 0x0001 /* fn1,sub0: Set Refresh Rate for Mode */ +#define S3_GET_REFRESH 0x0101 /* fn1,sub1: Get Refresh Rate for Mode */ +#define S3_QUERY_REFRESH 0x0201 /* fn1,sub2: Query Refresh Rates for Mode */ + +#define S3_QUERY_MODELIST 0x0202 /* fn2,sub2: Query Mode List */ +#define S3_GET_EXT_MODEINFO 0x0302 /* fn2,sub3: Get Extended Mode Info */ + +#define S3_QUERY_ATTACHED 0x0004 /* fn4,sub0: Query detected displays */ + +#define S3_GET_ACTIVE_DISP 0x0103 /* fn3,sub1: Get Active Display */ +#define S3_SET_ACTIVE_DISP 0x0003 /* fn3,sub0: Set Active Display */ +#define S3_ALT_SET_ACTIVE_DISP 0x8003 /* fn8003,sub0: Alternate Set Active Display */ + +#define S3_SET_TV_CONFIG 0x0007 /* fn7,sub0: Set TV Configuration */ +#define S3_GET_TV_CONFIG 0x0107 /* fn7,sub1: Get TV Configuration */ + + +#define BIOS_CRT1_ONLY 0x01 +#define BIOS_LCD_ONLY 0x02 +#define BIOS_TV_NTSC 0x04 +#define BIOS_TV_PAL 0x08 +#define BIOS_TV_ONLY 0x0c +#define BIOS_DVI_ONLY 0x20 +#define BIOS_DEVICE_MASK (BIOS_CRT1_ONLY|BIOS_LCD_ONLY|BIOS_TV_ONLY|BIOS_DVI_ONLY) + /* structures for vbe 2.0 */ #ifndef __GNUC__ Index: savage_video.c =================================================================== RCS file: /cvs/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/savage/savage_video.c,v retrieving revision 1.8 diff -u -r1.8 savage_video.c --- savage_video.c 26 Mar 2004 17:09:05 -0000 1.8 +++ savage_video.c 24 Jul 2004 22:15:42 -0000 @@ -285,18 +285,18 @@ * and the stride should have already been set properly in SavageSetGBD() */ if (!psav->bTiled) { - OUTREG(PRI_STREAM_STRIDE, + OUTREG(PSTREAM_STRIDE_REG, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | (psav->lDelta & 0x00001fff)); } else if (pScrn->bitsPerPixel == 16) { /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */ - OUTREG(PRI_STREAM_STRIDE, + OUTREG(PSTREAM_STRIDE_REG, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | 0x80000000 | (psav->lDelta & 0x00001fff)); } else if (pScrn->bitsPerPixel == 32) { - OUTREG(PRI_STREAM_STRIDE, + OUTREG(PSTREAM_STRIDE_REG, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | 0xC0000000 | (psav->lDelta & 0x00001fff)); } @@ -364,23 +364,35 @@ */ /* Primary stream reflects the frame buffer. */ OUTREG32(PRI_STREAM_FBUF_ADDR0, pScrn->fbOffset); + OUTREG32(PRI_STREAM2_FBUF_ADDR0, pScrn->fbOffset); if (!psav->bTiled) { OUTREG(PRI_STREAM_STRIDE, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | (psav->lDelta & 0x00001fff)); + OUTREG(PRI_STREAM2_STRIDE, + (((psav->lDelta * 2) << 16) & 0x3FFFE000) | + (psav->lDelta & 0x00001fff)); } else if (pScrn->bitsPerPixel == 16) { /* Scanline-length-in-bytes/128-bytes-per-tile * 256 Qwords/tile */ OUTREG(PRI_STREAM_STRIDE, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | 0x80000000 | (psav->lDelta & 0x00001fff)); + OUTREG(PRI_STREAM2_STRIDE, + (((psav->lDelta * 2) << 16) & 0x3FFFE000) + | 0x80000000 | (psav->lDelta & 0x00001fff)); } else if (pScrn->bitsPerPixel == 32) { OUTREG(PRI_STREAM_STRIDE, (((psav->lDelta * 2) << 16) & 0x3FFFE000) | 0xC0000000 | (psav->lDelta & 0x00001fff)); + OUTREG(PRI_STREAM2_STRIDE, + (((psav->lDelta * 2) << 16) & 0x3FFFE000) + | 0xC0000000 | (psav->lDelta & 0x00001fff)); } - OUTREG(PSTREAM_FBSIZE_REG, + OUTREG(PRI_STREAM_BUFFERSIZE, + pScrn->virtualX * pScrn->virtualY * (pScrn->bitsPerPixel >> 3)); + OUTREG(PRI_STREAM2_BUFFERSIZE, pScrn->virtualX * pScrn->virtualY * (pScrn->bitsPerPixel >> 3)); /* Primary stream reflects the frame buffer. */ #if 0