/* power mangement control taken from Benjamin Herrenschmidt and ATI */
/* reworked for xfree86 by Alex Deucher */


                                /* Driver data structures */
#include "radeon.h"
#include "radeon_macros.h"
#include "radeon_probe.h"
#include "radeon_reg.h"
#include "radeon_version.h"


#define RADEON_CLK_PWRMGT_CNTL_M6                       0x0014
#define RADEON_MCLK_MISC                                0x001F


#define	CLK_PWRMGT_CNTL_M6__ACTIVE_HILO_LAT__SHIFT         0x0000000d
#define	CLK_PWRMGT_CNTL_M6__DISP_DYN_STOP_LAT__SHIFT       0x0000000f
#define	CLK_PWRMGT_CNTL_M6__DYN_STOP_MODE__SHIFT           0x00000015

#define PIXCLKS_CNTL__PIX2CLK_ALWAYS_ONb                   0x00000040L
#define PIXCLKS_CNTL__PIX2CLK_DAC_ALWAYS_ONb               0x00000080L
#define PIXCLKS_CNTL__PIXCLK_BLEND_ALWAYS_ONb              0x00000800L
#define PIXCLKS_CNTL__PIXCLK_GV_ALWAYS_ONb                 0x00001000L
#define PIXCLKS_CNTL__PIXCLK_DIG_TMDS_ALWAYS_ONb           0x00002000L
#define PIXCLKS_CNTL__PIXCLK_LVDS_ALWAYS_ONb               0x00004000L
#define PIXCLKS_CNTL__PIXCLK_TMDS_ALWAYS_ONb               0x00008000L

#define SCLK_CNTL_M6__SCLK_SRC_SEL_MASK                    0x00000007L
#define SCLK_CNTL_M6__FORCE_DISP2                          0x00008000L
#define SCLK_CNTL_M6__FORCE_CP                             0x00010000L
#define SCLK_CNTL_M6__FORCE_HDP                            0x00020000L
#define SCLK_CNTL_M6__FORCE_DISP1                          0x00040000L
#define SCLK_CNTL_M6__FORCE_TOP                            0x00080000L
#define SCLK_CNTL_M6__FORCE_E2                             0x00100000L
#define SCLK_CNTL_M6__FORCE_SE                             0x00200000L
#define SCLK_CNTL_M6__FORCE_IDCT                           0x00400000L
#define SCLK_CNTL_M6__FORCE_VIP                            0x00800000L
#define SCLK_CNTL_M6__FORCE_RE                             0x01000000L
#define SCLK_CNTL_M6__FORCE_PB                             0x02000000L
#define SCLK_CNTL_M6__FORCE_TV_SCLK                        0x20000000L
#define SCLK_CNTL_M6__FORCE_SUBPIC                         0x40000000L
#define SCLK_CNTL_M6__FORCE_OV0                            0x80000000L

#define SCLK_MORE_CNTL__FORCE_DISPREGS                     0x00000100L
#define SCLK_MORE_CNTL__FORCE_MC_GUI                       0x00000200L
#define SCLK_MORE_CNTL__FORCE_MC_HOST                      0x00000400L

#define MCLK_MISC__MC_MCLK_MAX_DYN_STOP_LAT                0x00001000L
#define MCLK_MISC__IO_MCLK_MAX_DYN_STOP_LAT                0x00002000L
#define MCLK_MISC__MC_MCLK_DYN_ENABLE                      0x00004000L
#define MCLK_MISC__IO_MCLK_DYN_ENABLE                      0x00008000L

#define VCLK_ECP_CNTL__PIXCLK_ALWAYS_ONb                   0x00000040L
#define VCLK_ECP_CNTL__PIXCLK_DAC_ALWAYS_ONb               0x00000080L

#define CLK_PWRMGT_CNTL_M6__MC_CH_MODE                     0x00000100L
#define CLK_PWRMGT_CNTL_M6__ENGINE_DYNCLK_MODE_MASK        0x00001000L
#define CLK_PWRMGT_CNTL_M6__ENGINE_DYNCLK_MODE             0x00001000L
#define CLK_PWRMGT_CNTL_M6__ACTIVE_HILO_LAT_MASK           0x00006000L
#define CLK_PWRMGT_CNTL_M6__DISP_DYN_STOP_LAT_MASK         0x00008000L
#define CLK_PWRMGT_CNTL_M6__DYN_STOP_MODE_MASK             0x00e00000L

static void RADEONPMDisableDynamicMode(ScrnInfoPtr pScrn);
static void RADEONPMEnableDynamicMode(ScrnInfoPtr pScrn);