From 52fb681f416192dc022b565d461bf222a6d41856 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 6 Apr 2009 12:09:00 -0400 Subject: [PATCH] radeon: Fix vram setup on IGP cards Signed-off-by: Alex Deucher --- drivers/gpu/drm/radeon/r100.c | 27 ++++++++++++++++++--------- drivers/gpu/drm/radeon/r520.c | 6 +++--- drivers/gpu/drm/radeon/rs400.c | 9 ++------- 3 files changed, 23 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c index 7687512..1277258 100644 --- a/drivers/gpu/drm/radeon/r100.c +++ b/drivers/gpu/drm/radeon/r100.c @@ -155,9 +155,10 @@ static void r100_vram_get_type(struct radeon_device *rdev) uint32_t tmp; rdev->mc.vram_is_ddr = false; - if (RREG32(RADEON_MEM_SDRAM_MODE_REG) & RADEON_MEM_CFG_TYPE_DDR) { + if (rdev->flags & RADEON_IS_IGP) + rdev->mc.vram_is_ddr = true; + else if (RREG32(RADEON_MEM_SDRAM_MODE_REG) & RADEON_MEM_CFG_TYPE_DDR) rdev->mc.vram_is_ddr = true; - } if ((rdev->family == CHIP_RV100) || (rdev->family == CHIP_RS100) || (rdev->family == CHIP_RS200)) { @@ -187,14 +188,22 @@ static void r100_vram_get_type(struct radeon_device *rdev) void r100_vram_info(struct radeon_device *rdev) { r100_vram_get_type(rdev); - rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); - /* Some production boards of m6 will report 0 - * if it's 8 MB - */ - if (rdev->mc.vram_size == 0) { - rdev->mc.vram_size = 8192 * 1024; - WREG32(RADEON_CONFIG_MEMSIZE, 0x800000); + if (rdev->flags & RADEON_IS_IGP) { + uint32_t tom; + /* read NB_TOM to get the amount of ram stolen for the GPU */ + tom = RREG32(RADEON_NB_TOM); + rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); + WREG32(RADEON_CONFIG_MEMSIZE, rdev->mc.vram_size); + } else { + rdev->mc.vram_size = RREG32(RADEON_CONFIG_MEMSIZE); + /* Some production boards of m6 will report 0 + * if it's 8 MB + */ + if (rdev->mc.vram_size == 0) { + rdev->mc.vram_size = 8192 * 1024; + WREG32(RADEON_CONFIG_MEMSIZE, 0x800000); + } } rdev->mc.aper_base = drm_get_resource_start(rdev->ddev, 0); diff --git a/drivers/gpu/drm/radeon/r520.c b/drivers/gpu/drm/radeon/r520.c index d9dc92e..1edd327 100644 --- a/drivers/gpu/drm/radeon/r520.c +++ b/drivers/gpu/drm/radeon/r520.c @@ -86,18 +86,18 @@ static void r520_vram_get_type(struct radeon_device *rdev) { uint32_t tmp; - /* FIXME: R580 is not covered here so we set default width to 128 */ rdev->mc.vram_width = 128; rdev->mc.vram_is_ddr = true; tmp = RREG32_MC(R520_MC_CNTL0); - tmp = (tmp & R520_MEM_NUM_CHANNELS_MASK) >> R520_MEM_NUM_CHANNELS_SHIFT; - switch (tmp) { + switch ((tmp & R520_MEM_NUM_CHANNELS_MASK) >> R520_MEM_NUM_CHANNELS_SHIFT) { case 0: rdev->mc.vram_width = 32; break; case 1: rdev->mc.vram_width = 64; break; case 2: rdev->mc.vram_width = 128; break; case 3: rdev->mc.vram_width = 256; break; default: rdev->mc.vram_width = 128; break; } + if (tmp & R520_MC_CHANNEL_SIZE) + rdev->mc.vram_width *= 2; } void r520_vram_info(struct radeon_device *rdev) diff --git a/drivers/gpu/drm/radeon/rs400.c b/drivers/gpu/drm/radeon/rs400.c index 45590af..8caa818 100644 --- a/drivers/gpu/drm/radeon/rs400.c +++ b/drivers/gpu/drm/radeon/rs400.c @@ -218,13 +218,8 @@ void rs400_vram_info(struct radeon_device *rdev) rs400_gart_adjust_size(rdev); /* DDR for all card after R300 & IGP */ rdev->mc.vram_is_ddr = true; - /* FIXME: is this correct for RS480 ? */ - tmp = RREG32(RADEON_MEM_CNTL); - if (tmp & R300_MEM_NUM_CHANNELS_MASK) { - rdev->mc.vram_width = 128; - } else { - rdev->mc.vram_width = 64; - } + rdev->mc.vram_width = 128; + /* read NB_TOM to get the amount of ram stolen for the GPU */ tom = RREG32(RADEON_NB_TOM); rdev->mc.vram_size = (((tom >> 16) - (tom & 0xffff) + 1) << 16); -- 1.5.6.3