diff --git a/src/atombios_output.c b/src/atombios_output.c
index 24acbd7..7998a77 100644
--- a/src/atombios_output.c
+++ b/src/atombios_output.c
@@ -373,6 +373,45 @@ atombios_output_digital_setup(xf86OutputPtr output, int device, DisplayModePtr m
     return ATOM_NOT_IMPLEMENTED;
 }
 
+static void
+radeon_dce3_enable_dither(xf86OutputPtr output, int fmt_block)
+{
+    RADEONOutputPrivatePtr radeon_output = output->driver_private;
+    RADEONInfoPtr info       = RADEONPTR(output->scrn);
+    unsigned char *RADEONMMIO = info->MMIO;
+    uint32_t fmt_bit_depth_control;
+
+    ErrorF("LVDS_MISC: 0x%x\n",radeon_output->lvds_misc);
+    ErrorF("AVIVO_FMT1_BIT_DEPTH_CONTROL 0x%x\n", INREG(AVIVO_FMT1_BIT_DEPTH_CONTROL));
+    ErrorF("AVIVO_FMT0_BIT_DEPTH_CONTROL 0x%x\n", INREG(AVIVO_FMT0_BIT_DEPTH_CONTROL));
+
+    if (fmt_block)
+	fmt_bit_depth_control = INREG(AVIVO_FMT1_BIT_DEPTH_CONTROL);
+    else
+	fmt_bit_depth_control = INREG(AVIVO_FMT0_BIT_DEPTH_CONTROL);
+
+    fmt_bit_depth_control &= ~AVIVO_FMT_TRUNCATE_EN;
+
+    //fmt_bit_depth_control |= AVIVO_FMT_RGB_RANDOM_EN | AVIVO_FMT_HIGHPASS_RANDOM_EN;
+
+    if (radeon_output->lvds_misc & (1 << 5)) {
+	fmt_bit_depth_control |= AVIVO_FMT_SPATIAL_DITHER_EN;
+	if (radeon_output->lvds_misc & (1 << 1))
+	    fmt_bit_depth_control |= AVIVO_FMT_SPATIAL_DITHER_DEPTH;
+    }
+    if (radeon_output->lvds_misc & (1 << 6)) {
+	fmt_bit_depth_control |= AVIVO_FMT_TEMPORAL_DITHER_EN;
+	if (radeon_output->lvds_misc & (1 << 1))
+	    fmt_bit_depth_control |= AVIVO_FMT_TEMPORAL_DITHER_DEPTH;
+	if (((radeon_output->lvds_misc >> 2) & 0x3) == 2)
+	    fmt_bit_depth_control |= AVIVO_FMT_TEMPORAL_LEVEL;
+    }
+    if (fmt_block)
+	OUTREG(AVIVO_FMT1_BIT_DEPTH_CONTROL, fmt_bit_depth_control);
+    else
+	OUTREG(AVIVO_FMT0_BIT_DEPTH_CONTROL, fmt_bit_depth_control);
+}
+
 static int
 atombios_output_dig1_setup(xf86OutputPtr output, DisplayModePtr mode)
 {
@@ -969,6 +1008,7 @@ atombios_output_mode_set(xf86OutputPtr output,
 	    if (IS_DCE3_VARIANT) {
 		atombios_output_dig2_setup(output, adjusted_mode);
 		atombios_output_dig2_transmitter_setup(output, adjusted_mode);
+		radeon_dce3_enable_dither(output, 1);
 	    } else
 		atombios_output_digital_setup(output, ATOM_DEVICE_LCD1_INDEX, adjusted_mode);
 	}
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index 19f9869..d1f2eba 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -3875,6 +3875,25 @@
 
 #define AVIVO_DVOA_BIT_DEPTH_CONTROL			0x7988
 
+#define AVIVO_FMT0_BIT_DEPTH_CONTROL			0x6710
+#define AVIVO_FMT1_BIT_DEPTH_CONTROL			0x6f10
+#	define AVIVO_FMT_TRUNCATE_EN			        (1 << 0)
+#	define AVIVO_FMT_TRUNCATE_DEPTH			        (1 << 1)
+#	define AVIVO_FMT_SPATIAL_DITHER_EN		        (1 << 8)
+#	define AVIVO_FMT_SPATIAL_DITHER_MODE(x)		        ((x) << 9)
+#	define AVIVO_FMT_SPATIAL_DITHER_DEPTH		        (1 << 12)
+#	define AVIVO_FMT_FRAME_RANDOM_EN		        (1 << 13)
+#	define AVIVO_FMT_RGB_RANDOM_EN		                (1 << 14)
+#	define AVIVO_FMT_HIGHPASS_RANDOM_EN		        (1 << 15)
+#	define AVIVO_FMT_TEMPORAL_DITHER_EN		        (1 << 16)
+#	define AVIVO_FMT_TEMPORAL_DITHER_DEPTH		        (1 << 20)
+#	define AVIVO_FMT_TEMPORAL_DITHER_OFFSET(x)		((x) << 21)
+#	define AVIVO_FMT_TEMPORAL_LEVEL		                (1 << 24)
+#	define AVIVO_FMT_TEMPORAL_RESET		                (1 << 25)
+#	define AVIVO_FMT_25FRC_SEL(x)		                ((x) << 24)
+#	define AVIVO_FMT_50FRC_SEL(x)		                ((x) << 28)
+#	define AVIVO_FMT_75FRC_SEL(x)		                ((x) << 30)
+
 #define AVIVO_GPIO_0                        0x7e30
 #define AVIVO_GPIO_1                        0x7e40
 #define AVIVO_GPIO_2                        0x7e50