diff --git a/src/radeon_output.c b/src/radeon_output.c
index e453cc2..2a8591d 100644
--- a/src/radeon_output.c
+++ b/src/radeon_output.c
@@ -1669,10 +1669,15 @@ RADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state)
 	if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT)) {
 	    if (pRADEONI2CBus->mask_clk_reg == RADEON_GPIO_MONID)
                 OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
-					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1)));
+					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC1) |
+					       RADEON_SW_WANTS_TO_USE_DVI_I2C));
 	    else
                 OUTREG(RADEON_DVI_I2C_CNTL_0, (RADEON_I2C_SOFT_RST |
-					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3)));
+					       R200_DVI_I2C_PIN_SEL(R200_SEL_DDC3) |
+					       RADEON_SW_WANTS_TO_USE_DVI_I2C));
+
+	    while (!(INREG(RADEON_DVI_I2C_CNTL_0) & RADEON_SW_CAN_USE_I2C))
+		;
 	}
 
 	temp = INREG(pRADEONI2CBus->a_clk_reg);
@@ -1700,6 +1705,11 @@ RADEONI2CDoLock(xf86OutputPtr output, I2CBusPtr b, int lock_state)
     OUTREG(pRADEONI2CBus->mask_data_reg, temp);
     temp = INREG(pRADEONI2CBus->mask_data_reg);
 
+    if (!lock_state) {
+	if ((info->ChipFamily >= CHIP_FAMILY_R200) && (!IS_AVIVO_VARIANT))
+	    OUTREG(RADEON_DVI_I2C_CNTL_0, INREG(RADEON_DVI_I2C_CNTL_0) | RADEON_SW_DONE_USING_DVI_I2C);
+    }
+
     return TRUE;
 }
 
diff --git a/src/radeon_reg.h b/src/radeon_reg.h
index c418a25..621737e 100644
--- a/src/radeon_reg.h
+++ b/src/radeon_reg.h
@@ -1030,6 +1030,10 @@
 #       define R200_SEL_DDC1                0 /* 0x60 - VGA_DDC */
 #       define R200_SEL_DDC2                1 /* 0x64 - DVI_DDC */
 #       define R200_SEL_DDC3                2 /* 0x68 - MONID_DDC */
+#       define RADEON_SW_WANTS_TO_USE_DVI_I2C (1 << 13) /* W */
+#       define RADEON_SW_CAN_USE_I2C        (1 << 13) /* R */
+#       define RADEON_SW_DONE_USING_DVI_I2C (1 << 14) /* W */
+#       define RADEON_HW_I2C_PRESCALE(x)    ((x) << 16)
 #define RADEON_DVI_I2C_CNTL_1               0x02e4
 #define RADEON_DVI_I2C_DATA		    0x02e8