diff --git a/src/radeon_driver.c b/src/radeon_driver.c
index 7424577..8b1a3cf 100644
--- a/src/radeon_driver.c
+++ b/src/radeon_driver.c
@@ -1333,8 +1333,8 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
 		    aper0_base &= ~(mem_size - 1);
 
 	    if (info->ChipFamily >= CHIP_FAMILY_R600) {
-		info->mc_fb_location = (aper0_base >> 24) |
-		    (((aper0_base + mem_size - 1) & 0xff000000U) >> 8);
+		info->mc_fb_location = ((aper0_base >> 24) & 0x0000ffffU) |
+		    (((aper0_base + mem_size - 1) >> 8) & 0xffff0000U);
 		ErrorF("mc fb loc is %08x\n", (unsigned int)info->mc_fb_location);
 	    } else {
 		info->mc_fb_location = (aper0_base >> 16) |
@@ -1345,21 +1345,16 @@ static void RADEONInitMemoryMap(ScrnInfoPtr pScrn)
     if (info->ChipFamily >= CHIP_FAMILY_R600) {
 	info->fbLocation = (info->mc_fb_location & 0xffff) << 24;
     } else {
-   	info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
+	info->fbLocation = (info->mc_fb_location & 0xffff) << 16;
     }
     /* Just disable the damn AGP apertures for now, it may be
      * re-enabled later by the DRM
      */
 
-    if (IS_AVIVO_VARIANT) {
-	if (info->ChipFamily >= CHIP_FAMILY_R600) {
-	    OUTREG(R600_HDP_NONSURFACE_BASE, (info->mc_fb_location << 16) & 0xff0000);
-	} else {
-	    OUTREG(AVIVO_HDP_FB_LOCATION, info->mc_fb_location);
-	}
-    	info->mc_agp_location = 0x003f0000;
-    } else
-    	info->mc_agp_location = 0xffffffc0;
+    if (IS_AVIVO_VARIANT)
+	info->mc_agp_location = 0x003f0000;
+    else
+	info->mc_agp_location = 0xffffffc0;
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 	       "RADEONInitMemoryMap() : \n");
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1506,6 +1501,9 @@ static uint32_t RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
     info->dri->newMemoryMap = TRUE;
 #endif /* XF86DRI */
 
+    if (info->ChipFamily >= CHIP_FAMILY_R600)
+	return aper_size;
+
     /* Set HDP_APER_CNTL only on cards that are known not to be broken,
      * that is has the 2nd generation multifunction PCI interface
      */
@@ -1514,7 +1512,7 @@ static uint32_t RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
 	info->ChipFamily == CHIP_FAMILY_RV380 ||
 	info->ChipFamily == CHIP_FAMILY_R420 ||
 	info->ChipFamily == CHIP_FAMILY_RV410 ||
-        IS_AVIVO_VARIANT) {
+	IS_AVIVO_VARIANT) {
 	    OUTREGP (RADEON_HOST_PATH_CNTL, RADEON_HDP_APER_CNTL,
 		     ~RADEON_HDP_APER_CNTL);
 	    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
@@ -1539,8 +1537,8 @@ static uint32_t RADEONGetAccessibleVRAM(ScrnInfoPtr pScrn)
      * we expect the BIOS to have done the right thing (might be too optimistic...)
      */
     if (INREG(RADEON_HOST_PATH_CNTL) & RADEON_HDP_APER_CNTL)
-        return aper_size * 2;
-    
+	return aper_size * 2;
+
     return aper_size;
 }
 
@@ -1591,9 +1589,10 @@ static Bool RADEONPreInitVRAM(ScrnInfoPtr pScrn)
     if (pScrn->videoRam > accessible)
 	pScrn->videoRam = accessible;
 
-    if (!IS_AVIVO_VARIANT)
+    if (!IS_AVIVO_VARIANT) {
 	info->MemCntl            = INREG(RADEON_SDRAM_MODE_REG);
-    info->BusCntl            = INREG(RADEON_BUS_CNTL);
+	info->BusCntl            = INREG(RADEON_BUS_CNTL);
+    }
 
     RADEONGetVRamType(pScrn);