diff --git a/linux-core/radeon_combios.c b/linux-core/radeon_combios.c
index f89bf88..194e05a 100644
--- a/linux-core/radeon_combios.c
+++ b/linux-core/radeon_combios.c
@@ -1304,6 +1304,36 @@ static void combios_parse_ram_reset_table(struct drm_device *dev, uint16_t offse
 	}
 }
 
+static void combios_write_ram_size(struct drm_device *dev)
+{
+	struct drm_radeon_private *dev_priv = dev->dev_private;
+	uint8_t rev;
+	uint16_t offset;
+	uint32_t mem_size = 0;
+
+	/* should do something smarter here I guess... */
+	if (dev_priv->flags & RADEON_IS_IGP)
+	    return;
+
+	offset = combios_get_table_offset(dev, COMBIOS_MEM_CONFIG_TABLE);
+
+	rev = radeon_bios8(dev_priv, offset - 1);
+	if (rev < 1) {
+	    /* r1xx seems to be a look up table of some sort
+	     * r2xx should be ok
+	     */
+	    if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_R200)
+		mem_size = 0; // FIXME
+	    else
+		mem_size = radeon_bios8(dev_priv, offset);
+	} else {
+	    mem_size = radeon_bios8(dev_priv, offset);
+	    mem_size *= 2; /* convert to MB */
+	}
+	mem_size *= (1024 * 1024); /* convert to bytes */
+	RADEON_WRITE(RADEON_CONFIG_MEMSIZE, mem_size);
+}
+
 void radeon_combios_dyn_clk_setup(struct drm_device *dev, int enable)
 {
 	uint16_t dyn_clk_info = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
@@ -1346,16 +1376,14 @@ void radeon_combios_asic_init(struct drm_device *dev)
 	if (table)
 		combios_parse_mmio_table(dev, table);
 
+	/* write CONFIG_MEMSIZE */
+	combios_write_ram_size(dev);
+
 	/* DYN CLK 1 */
 	table = combios_get_table_offset(dev, COMBIOS_DYN_CLK_1_TABLE);
 	if (table)
 		combios_parse_pll_table(dev, table);
 
-	/* ASIC INIT 5 */
-	table = combios_get_table_offset(dev, COMBIOS_ASIC_INIT_5_TABLE);
-	if (table)
-		combios_parse_mmio_table(dev, table);
-
 }
 
 void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev)