diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index b045b6a..6e5eb20 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1024,7 +1024,7 @@ void r600_pciep_wreg(struct radeon_device *rdev, u32 reg, u32 v)
  */
 void r600_cp_stop(struct radeon_device *rdev)
 {
-	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(0xff));
+	WREG32(R_0086D8_CP_ME_CNTL, S_0086D8_CP_ME_HALT(1));
 }
 
 static int r600_cp_load_microcode(struct radeon_device *rdev)
@@ -1590,6 +1590,7 @@ int r600_ib_test(struct radeon_device *rdev)
         WREG32(scratch, 0xCAFEDEAD);
         r = radeon_ib_get(rdev, &ib);
         if (r) {
+                DRM_ERROR("radeon: failed to get ib (%d).\n", r);
                 return r;
         }
 	ib->ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);
@@ -1600,15 +1601,25 @@ int r600_ib_test(struct radeon_device *rdev)
         ib->ptr[5] = PACKET2(0);
         ib->ptr[6] = PACKET2(0);
         ib->ptr[7] = PACKET2(0);
-        ib->length_dw = 8;
+        ib->ptr[8] = PACKET2(0);
+        ib->ptr[9] = PACKET2(0);
+        ib->ptr[10] = PACKET2(0);
+        ib->ptr[11] = PACKET2(0);
+        ib->ptr[12] = PACKET2(0);
+        ib->ptr[13] = PACKET2(0);
+        ib->ptr[14] = PACKET2(0);
+        ib->ptr[15] = PACKET2(0);
+        ib->length_dw = 16;
         r = radeon_ib_schedule(rdev, ib);
         if (r) {
                 radeon_scratch_free(rdev, scratch);
                 radeon_ib_free(rdev, &ib);
+                DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
                 return r;
         }
         r = radeon_fence_wait(ib->fence, false);
         if (r) {
+                DRM_ERROR("radeon: fence wait failed (%d).\n", r);
                 return r;
         }
         for (i = 0; i < rdev->usec_timeout; i++) {
diff --git a/drivers/gpu/drm/radeon/radeon_asic.h b/drivers/gpu/drm/radeon/radeon_asic.h
index 4afa1ef..6443c12 100644
--- a/drivers/gpu/drm/radeon/radeon_asic.h
+++ b/drivers/gpu/drm/radeon/radeon_asic.h
@@ -542,7 +542,7 @@ static struct radeon_asic r600_asic = {
 	.ring_start = NULL,
 	.ring_test = &r600_ring_test,
 	.ring_ib_execute = &r600_ring_ib_execute,
-	.ib_test = &r100_ib_test,
+	.ib_test = &r600_ib_test,
 	.irq_set = &r600_irq_set,
 	.irq_process = &r600_irq_process,
 	.fence_ring_emit = &r600_fence_ring_emit,
@@ -591,7 +591,7 @@ static struct radeon_asic rv770_asic = {
 	.ring_start = NULL,
 	.ring_test = &r600_ring_test,
 	.ring_ib_execute = &r600_ring_ib_execute,
-	.ib_test = &r100_ib_test,
+	.ib_test = &r600_ib_test,
 	.irq_set = &r600_irq_set,
 	.irq_process = &r600_irq_process,
 	.fence_ring_emit = &r600_fence_ring_emit,
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 9f6d01c..8107a00 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -228,11 +228,17 @@ static void rv770_mc_resume(struct radeon_device *rdev)
 /*
  * CP.
  */
+void r700_cp_stop(struct radeon_device *rdev)
+{
+	WREG32(CP_ME_CNTL, (CP_ME_HALT | CP_PFP_HALT));
+}
+
+
 static int rv770_cp_load_microcode(struct radeon_device *rdev)
 {
 	int i;
 
-	r600_cp_stop(rdev);
+	r700_cp_stop(rdev);
 	WREG32(CP_RB_CNTL, RB_NO_UPDATE | (15 << 8) | (3 << 0));
 
 	/* Reset cp */
@@ -892,7 +898,7 @@ int rv770_resume(struct radeon_device *rdev)
 int rv770_suspend(struct radeon_device *rdev)
 {
 	/* FIXME: we should wait for ring to be empty */
-	r600_cp_stop(rdev);
+	r700_cp_stop(rdev);
 	return 0;
 }
 
diff --git a/drivers/gpu/drm/radeon/rv770d.h b/drivers/gpu/drm/radeon/rv770d.h
index b0a4354..4b9c3d6 100644
--- a/drivers/gpu/drm/radeon/rv770d.h
+++ b/drivers/gpu/drm/radeon/rv770d.h
@@ -63,6 +63,7 @@
 
 #define	CP_ME_CNTL					0x86D8
 #define		CP_ME_HALT					(1<<28)
+#define		CP_PFP_HALT					(1<<26)
 #define	CP_ME_RAM_DATA					0xC160
 #define	CP_ME_RAM_RADDR					0xC158
 #define	CP_ME_RAM_WADDR					0xC15C